Posts of Electronics Geek | VLSI & Electronics Jobs

❓ Can you answer these in a DV or RTL interview? 🔹 Why does an APB transfer take 2 clock cycles? 🔹 What is a pipelined transfer in AHB? 🔹 Why does AXI have 5 separate channels? If not, our AMBA Protocols Live Batch is for you 👇 👨‍🏫 Learn from a Senior Staff Verification Engineer with 9+ years of experience (DV interview panelist) 📅 Sat–Sun, 14 & 15 Nov | 11 AM | Live on Zoom ✅ Understanding the protocol specification ✅ RTL of the slave ✅ Verilog testbench 🎓 For students, freshers and working engineers planning a switch 💰 ₹999 ⏳ Booking closes on 12 Nov 👉 Book now: https://rzp.io/rzp/eg-amba 📞 Doubts? WhatsApp +91 92860 25869

🚨 VIT VELLORE IS HIRING! 💼 Role: Ph.D. Candidate – Nanoelectronics and VLSI (School of Electronics Engineering) 📍 Location: Vellore, Tamil Nadu (On-site) 🧑‍💻 Experience: Fresher / Research role (research experience is a plus) 🎓 Qualification: Master's degree, or Bachelor's for Direct Ph.D., in Electronics, VLSI, Nanotechnology, Physics or related field 🛠 Skills: Nanoscale devices & circuits, Research & data analysis, Technical writing https://www.linkedin.com/jobs/view/4479479787/ 📢 Join the Electronics Geek Community 👇🏻 ✅ Telegram: https://telegram.dog/electronicsgeekchannel ✅ WhatsApp: https://www.whatsapp.com/channel/0029Va56uDPGufIzehrBTl3E ✅ YouTube: https://www.youtube.com/@electronicsgeek Share with your friends and fellow VLSI engineers! All the best! 🙌

🚨 RISE RESEARCH IS HIRING! 💼 Role: VLSI / Verilog Expert – AI Task Creator & Reviewer 💰 Pay: per task, up to ₹10,000 per verified task 📍 Location: Remote (India) 🧑‍💻 Experience: Hands-on VLSI experience (engineers, trainers, instructors) 🛠 Skills: Verilog/SystemVerilog RTL & verification, ModelSim/Vivado/Cadence/Synopsys, writing clear technical problems 🔗 Apply: https://www.linkedin.com/jobs/view/4482939373/ 💡 Want to sharpen your protocol skills? Join our AMBA live batch (14 & 15 Nov) 👉 https://rzp.io/rzp/eg-amba 📢 Join the Electronics Geek Community 👇🏻 ✅ Telegram: https://telegram.dog/electronicsgeekchannel ✅ WhatsApp: https://www.whatsapp.com/channel/0029Va56uDPGufIzehrBTl3E ✅ YouTube: https://www.youtube.com/@electronicsgeek Share with your friends and fellow VLSI engineers! All the best! 🙌

Hi Guys 👋🏻 Meta is hiring freshers 🔥 https://youtu.be/7eHEBgmxrsg&list=UULFjx96VpV4g2KvuGt4wAjNrw 🔁 Share this with an ECE/EEE friend looking for a opportunity!

Hi guys! 👋 Atria Logic is hiring FPGA Engineers in Tirupati! 🚀 Don’t miss this one 👇 💼 Role: FPGA Engineer 📍 Location: Tirupati, Andhra Pradesh 🎓 Eligibility: B.E/B.Tech or M.E/M.Tech in ECE, EEE or related fields 🧑‍💻 Experience: 6 months to 1 year of hands-on FPGA design experience ✅ Good news: M.Tech grads can apply too! 🛠 Skills: Verilog/VHDL, RTL design & verification, Xilinx/Intel FPGA tools (Vivado, Quartus), timing analysis & constraints, FPGA resource optimization (LUTs, DSP, BRAM), and bench testing/debugging 📧 How to apply: Send your updated resume to [email protected] 👉 Subject line: Application for FPGA Engineer – [Your Name] If you have some early FPGA experience, this is a great chance to grow in core VLSI, so apply soon and give it your best shot! 💪 📢 Know someone in VLSI looking for a job? Share this with them! 📢 Join the Electronics Geek Community 👇🏻 ✅Telegram: https://telegram.dog/electronicsgeekchannel ✅WhatsApp: https://www.whatsapp.com/channel/0029Va56uDPGufIzehrBTl3E ✅ YouTube: https://www.youtube.com/@electronicsgeek Share with your friends and fellow VLSI engineers! All the best! 🙌

Hi guys! 👋 Arm is hiring freshers in Bengaluru! 🚀 Don't miss this one 👇 💼 Role: Associate Engineer 📍 Location: Bengaluru 🎓 Eligibility: B.E/B.Tech or M.E/M.Tech in CS, IS, ECE or related fields (or equivalent experience) ✅ Good news: M.Tech grads can apply too! 🛠 Skills: Check the full job description at the link below 🔗 Apply here: https://careers.arm.com/job/bengaluru/associate-engineer/33099/101597570352 Getting into a company like Arm early in your career is a big deal, so apply soon and give it your best shot! 💪 📢 Know someone in VLSI looking for a job? Share this with them! 💡 Want to prepare RTL + testbench for interviews like this? Join our AMBA live batch on 14 & 15 Nov 👉 https://rzp.io/rzp/eg-amba All the best! 🙌

Hi Guys 👋🏻 🔥 A fresh opportunity is now LIVE on YouTube! 👉 Don’t miss this one: https://youtu.be/o00s9x-HCCI&list=UULFjx96VpV4g2KvuGt4wAjNrw 🔁 Share this with an ECE/EEE friend looking for a opportunity!

🚨 FRESHER HIRING | SYNOPSYS 🚀 💼 Digital Design Engineer Apprentice 📍 Noida (work from office) 🎓 2025 & 2026 batch | B.E/B.Tech ECE, EEE or related ⏳ 12 months, starts Nov 2026 🛠 Skills: Verilog, SystemVerilog, RTL + testbench writing (UVM is a plus) ⚠️ No M.Tech, and you should not be in a full-time job right now 🔗 Apply: https://careers.synopsys.com/job/noida/digital-design-engineer-apprenticeship/44408/102251697536 📢 Share with your VLSI friends! 💡 Want to learn RTL + testbench for interviews like this? Join our AMBA live batch on 14 & 15 Nov 👉 https://rzp.io/rzp/eg-amba

🔥 AMBA Protocols Live Batch: New batch open Learn APB, AHB and AXI the way they are used in real chip projects. Who is this for: 🎓 ECE/EEE students and freshers preparing for VLSI jobs 💼 Working engineers (1 to 5 years) planning a job switch to DV or RTL roles 🔄 Engineers from other domains (embedded, testing, FPGA) who want to move into VLSI 📅 Sat, 14 Nov: APB + AHB Protocol (11 AM to 2 PM) 📅 Sun, 15 Nov: AXI Protocol (11 AM to 1:30 PM) 💻 Live on Zoom, on the weekend, so working people can join What you will learn: ✅ Understanding the protocol specification ✅ RTL of the slave ✅ Verilog testbench 👨‍🏫 Trainer: Mr. Sha Senior Staff Verification Engineer, about 9 years of experience. He has worked on-site at ARM, NVIDIA, Marvell and Collins Aerospace, and he is a DV interview panelist who has interviewed 50+ candidates. AMBA protocols come up in almost every DV interview, and you’ll learn them from someone who takes those interviews. 💰 Fee: ₹999 👉 Book here: https://rzp.io/rzp/eg-amba You only need basic Verilog to join. 📞 Questions? WhatsApp: +91 92860 25869

🚨 MULYA TECHNOLOGIES IS HIRING! 🚨 🔥Role: Staff Synthesis & STA Engineer 📍 Location: Bengaluru (Hybrid) 🔬 Skills: Digital synthesis & DFT insertion • Timing constraints (IP / full-chip) • STA signoff • Liberty models 👉 Apply Now: https://www.linkedin.com/jobs/view/4482456081/ 📢 Join the Electronics Geek Community 👇🏻 ✅Telegram: https://telegram.dog/electronicsgeekchannel ✅WhatsApp: https://www.whatsapp.com/channel/0029Va56uDPGufIzehrBTl3E ✅ YouTube: https://www.youtube.com/@electronicsgeek Share with your friends and fellow VLSI engineers!

🚨 TESLA IS HIRING! 🚨 🔥Role: Physical Design Engineer (AI Hardware) 📍 Location: Bengaluru (On-site) 🎓 Eligibility: ✅ Engineering degree in a relevant field, or equivalent work experience ✅ 2+ years of industry experience in VLSI / IC design 🔬 Skills: Floorplanning & partitioning • Synthesis, place & route • Timing & physical closure • Reading RTL 👉 Apply Now: https://www.linkedin.com/jobs/view/4483339450/ 📢 Join the Electronics Geek Community 👇🏻 ✅Telegram: https://telegram.dog/electronicsgeekchannel ✅WhatsApp: https://www.whatsapp.com/channel/0029Va56uDPGufIzehrBTl3E ✅ YouTube: https://www.youtube.com/@electronicsgeek Share with your friends and fellow VLSI engineers!

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⏳ AMBA batch starts TOMORROW, 11 AM! APB, AHB & AXI live with Mr. Sha (9+ yrs Experience ) ✅ Protocol spec ✅ RTL slave ✅ Verilog testbench 📅 Sat–Sun, 24 & 25 Oct | 11 AM 👉 https://rzp.io/rzp/eg-amba 📞 Any doubts? WhatsApp or call: +91 92860 25869

🚨 O-HIVE. AI IS HIRING! 🚨 🔥Role: ASIC Engineer 📍 Location: New Delhi (On-site) 🔬 Skills: RTL design in Verilog / SystemVerilog • Testbenches & UVM • Lint, CDC / RDC & formal checks • Synthesis support 👉 Apply Now: https://www.linkedin.com/jobs/view/4478194912/ 📢 Follow on WhatsApp for more VLSI jobs: https://www.whatsapp.com/channel/0029Va56uDPGufIzehrBTl3E

📊 APB vs AHB vs AXI (save this!) 🔹 APB: simple, for slow peripherals (UART, GPIO) 🔹 AHB: pipelined, supports bursts 🔹 AXI: 5 separate channels, fastest, most asked in interviews Want to code all 3 yourself? Batch starts Saturday 👇 https://rzp.io/rzp/eg-amba 📞 Any doubts? WhatsApp or call: +91 92860 25869

Honeywell is hiring Embedded Interns 🔥 ✅ B.E / B.Tech students ✅ C / C++ + Microcontroller basics https://ibqbjb.fa.ocs.oraclecloud.com/hcmUI/CandidateExperience/en/sites/Honeywell/job/159847 📢 Follow on WhatsApp for more VLSI jobs: https://www.whatsapp.com/channel/0029Va56uDPGufIzehrBTl3E

😰 “Explain the AXI handshake.” “What’s the difference between AHB and APB?” These come up in almost every DV & RTL interview, and most freshers get stuck on them. 🔥 AMBA Protocols Live Batch with Mr. Sha (9+ yrs Experience ) ✅ Protocol spec ✅ RTL slave ✅ Verilog testbench 📅 Sat–Sun, 24 & 25 Oct | 11 AM | ₹999 Last seats 👇 👉 https://rzp.io/rzp/eg-amba

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🚨 MICROCHIP TECHNOLOGY IS HIRING! 🚨 🔥Role: Engineer II – Verification 📍 Location: Chennai 🎓 Eligibility: ✅ Bachelor's or Master's in Electrical / Electronic Engineering or related field ✅ 2–4 years of experience in ASIC/SoC verification 🔬 Skills: SystemVerilog • UVM test environments • RTL & testbench debug 👉 Apply Now: https://www.linkedin.com/jobs/view/4481799278/ 📢 Follow on WhatsApp for more VLSI jobs: https://www.whatsapp.com/channel/0029Va56uDPGufIzehrBTl3E #Microchip #VLSIJobs #DesignVerification #UVM #ECEJobs #Semiconductor

Hi Guys 👋🏻 🎥 New Job video is LIVE! 👉 Watch here: https://youtu.be/9HYOha_M74Y&list=UULFjx96VpV4g2KvuGt4wAjNrw 🔁 Share this with an ECE/EEE friend looking for a opportunity!

🚀 Synopsys Hiring: CFD Intern (Pune) * Role: Computational Fluid Dynamics (CFD) Intern * Location:Pune, India (Onsite, Full-Time) * Duration & Stipend: 6 months | ₹45K/month * Eligibility: Master’s in Mechanical, Aerospace, or Thermal Engineering (2027 batch) * Key Skills: ANSYS Fluent, ANSYS Workbench, CHT/Flow simulations [Apply on Synopsys Careers](https://careers.synopsys.com/job/pune/computational-fluid-dynamics-cfd-internship/44408/101746583168) 📢 Follow on WhatsApp for more VLSI jobs: https://www.whatsapp.com/channel/0029Va56uDPGufIzehrBTl3E

🚨 META IS HIRING! 🚨 🔥Role: ASIC Engineer – Design Verification 📍 Location: Bengaluru 🎓 Eligibility: ✅ Bachelor's in Computer Science / Computer Engineering or related field ✅ 2+ years in SystemVerilog/UVM or C/C++ based verification 🔬 Skills: SystemVerilog • UVM • Assertions / Formal / Emulation • Python / TCL / Perl 👉 Apply Now: https://www.linkedin.com/jobs/view/4433158142/ 📢 Follow on WhatsApp for more VLSI jobs: https://www.whatsapp.com/channel/0029Va56uDPGufIzehrBTl3E 🔁 Share this with an ECE/EEE friend looking for a semiconductor opportunity!

https://lnkd.in/p/dYwZuSjM

🚀 **Hiring: DV Engineers – Trained Freshers** 🏢 **Company:** Vidian 💼 **Role:** Design Verification Engineer 📍 **Location:** Hyderabad & Bangalore **Eligibility:** • B.E./B.Tech in ECE, EEE, E&I or related branches • 2022, 2023, 2024 & 2025 batches • Must have completed DV training **Skills:** SystemVerilog, UVM, Verilog, ASIC Verification 📩 **share your CV:** [email protected] 📢 Follow on WhatsApp for more VLSI jobs: https://www.whatsapp.com/channel/0029Va56uDPGufIzehrBTl3E

🙏 Thanks to everyone who joined today’s session with Mr. Sha! 3 key takeaways on Functional Verification: 1️⃣ Design says what the chip does; verification proves it does it correctly 2️⃣ ~60–70% of chip project effort goes into verification, which is why DV roles are in high demand 3️⃣ Start with Verilog testbenches → then SystemVerilog → then UVM Missed it? Drop a 🙋 and we’ll plan another one

We are live 🔥

🔴 TODAY, 11 AM Live VLSI Webinar: Functional Verification with a real DV interview panelist 🎯 Last chance at ₹99 👇 https://topmate.io/electronics_geek/2358022

⏳ TOMORROW, 11 AM! 😓 Freeze when the interviewer asks “How would you verify this design?” Learn how verification really works, live from Mr. Sha, who takes DV interviews himself 🎯 🔍 What is Functional Verification? 📅 Sun, 18 Oct | 11 AM 🎟 Just ₹99 | Last few seats 👉 https://topmate.io/electronics_geek/2358022

🚨 MICRON IS HIRING! 🚨 🔥Role: MTS - ANALOG LAYOUT 📍 Location: Bengaluru 🔬 Skills Required: Full-Custom Layout • FinFET (3nm / 5nm) • DRC / LVS • Device Matching • Python Scripting 📢 Join the Electronics Geek Community 👇🏻 ✅Telegram: https://telegram.dog/electronicsgeekchannel ✅WhatsApp: https://www.whatsapp.com/channel/0029Va56uDPGufIzehrBTl3E ✅ YouTube: https://www.youtube.com/@electronicsgeek 👉 Apply Now: https://careers.micron.com/careers/job/44989750 🔁 Share this with an ECE/EEE friend looking for a semiconductor opportunity!

💸 About to spend thousands on a VLSI course? First understand what a Verification Engineer actually does, for just ₹99. 🔍 Live webinar: What is Functional Verification? 👨‍💻 With Mr. Sha: 9+ yrs in industry, worked on-site at ARM & NVIDIA, DV interview panelist 📅 Sun, 18 Oct | 11 AM 👉 https://topmate.io/electronics_geek/2358022 Forward to your ECE friends 🙌